1. Field of the Invention
The present invention relates to current sources. More particularly, the present invention relates to a high-current, high-speed, high-accuracy current driver for differentially switching accurate currents onto different loads.
2. Description of the Related Art
Accurate current sources are needed for a variety of operations, including to provide current for driving transformers in 100BaseTX networks and for use in digital-to-analog converters. In the past, current-mirror cascode type current sources have been used.
One type of conventional current source is the regulated cascode current mirror. FIG. 1 is a circuit diagram of a conventional regulated cascode current mirror.
As shown in FIG. 1, the current mirror has an input node 1, a first mirror transistor 3, a second mirror transistor 5, an output transistor 7, a voltage amplifier 9, and an output node 11. The voltage amplifier 9 is preferably a differential amplifier. The first mirror transistor 3 has its drain and gate connected to the input node 1 and its source connected to ground. The second mirror transistor 5 has its gate connected to the gate of the first mirror transistor 5, its drain connected to the source of the output transistor 7, and its source connected to ground. The output transistor 7 has its gate connected to the output of the voltage amplifier 9, its source connected to the drain of the second transistor 5, and its drain connected to the output node 11. The voltage amplifier 9 has its non-inverting input connected to a reference voltage Vref, and its inverting input connected to the source of the output transistor 7. The input node receives an input current IIN, and the output node 11 provides an output current IOUT.
The operation of the regulated cascode current mirror shown in FIG. 1 is described below. An input current IIN is initially supplied to the input node 1. Because the gates of both mirror transistors 3 and 5 are connected to the input node 1, both transistors 3 and 5 are turned on when it receives this current input. The gate-to-source voltage for the two mirror transistors 3 and 5 is identical, since the two have a common gate voltage and a common source voltage (both sources being grounded). In addition, in the first mirror transistor 3, the drain-to-source voltage is identical with its gate-to-source voltage, since the gate and drain are connected together.
The current flowing through the second mirror transistor will depend upon how the drain-to-source voltage of the second mirror transistor 5 compares with that of the first mirror transistor 3. If the two drain-to-source voltages are identical, then the currents passing through the first and second mirror transistors 3 and 5 will be the same. As the drain-to-source voltage of the second mirror transistor 5 increases, so too does the current passing through it, and the gain of the circuit is increased. Likewise, as the drain-to-source voltage of the second mirror transistor 5 decreases, the current passing through it also decreases and the gain of the circuit is reduced.
The output transistor 7 and the voltage amplifier 9 then serve to regulate the output of the current mirror formed by the first and second mirror transistors 3 and through the use of a feedback loop, as is well understood in the art.
The current mirror of FIG. 1 only allows for a single output current, however. In many applications, e.g. digital-to-analog converters, driving transformers in 100BaseTX networks multiple output current lines are required based on a single input current. One way of providing this multiple output is through the use of a differential amplifier as a current splitter.
FIG. 2 is a circuit diagram showing a conventional differential amplifier used as a current splitter. As shown in FIG. 2, the differential amplifier comprises an input node 21, first and second transistors 23 and 25, first and second control nodes 27 and 29, and first and second output nodes 31 and 33. The first transistor 23 has its source connected to the input node 21, its drain connected to the first output node 31, and its gate connected to the first control node 27. The second transistor 25 has its source connected to the input node 21, its drain connected to the second output node 33, and its gate connected to the second control node 29. The first control nodes 27 receives the first control signal C1 and controls the operation of the first transistor 23 by providing the first control signal C1 to the gate of the first transistor 23. The second control nodes 29 receives the second control signal C2 and controls the operation of the second transistor 25 by providing the second control signal C2 to the gate of the second transistor 25. The input node 21 receives the input current IIN; the first output node 31 provides a first output current IOUT1 when the first transistor 23 is turned on; and the second output node 33 provides a second output current IOUT2 when the second transistor 25 is turned on.
The operation of the differential amplifier of FIG. 2 as a current splitter is described below. The differential amplifier can provide different outputs at the two output nodes 31 and 33 depending upon the values of the first and second control signals C1 and C2, and whether the first and second transistors 23 and 25 are turned on. As each of the two transistors 23 and 25 is turned on, it allows some or all of the input current IIN to flow through it to its respective output node 31 or 33. Table 1 shows the output currents IOUT1 and IOUT2 for the possible combinations of C1 and C2.
As shown Table 1, if C1 and C2 are both xe2x80x9c0xe2x80x9d, th the first and second transistors 23 And 25 will both be turned off and no current will be able to flow through either transistor. As a result, the currents IOUT1 and IOUT2 at the first and second output nodes 31 and 33 will both be zero. If C1 is xe2x80x9c0xe2x80x9d and C2 is xe2x80x9c1xe2x80x9d, then the first transistor will be turned off and the second transistors will be turned on. The input current will thus be able to flow through the second transistor 25, but not through the first transistor 23. As a result, the current IOUT1, at the first output node 31 will be zero and the current IOUT2 at the second output node 33 will be IIN Similarly, if C1 is xe2x80x9c1xe2x80x9d and C2 is xe2x80x9c0xe2x80x9d, then the first transistor will be turned on and the second transistors will be turned off. The input current will be able to flow through the first transistor 23, but not through the second transistor 25. As a result, the current IOUT1, at the first output node 31 will be IIN and the current IOUT2 at the second output node 33 will be zero. Finally, if C1 and C2 are both xe2x80x9c1xe2x80x9d, then the first transistor 23 and the second transistor 25 will both be turned on, and the input current IIN will be able to flow through both the first transistor 23 and the second transistor 25. As a result, the current IOUT1 at the first output node 31 and the current IOUT2 at the second output node 33 will both be IIN/2.
To insure an accurate current division, it is preferable to keep the conductive transistors in saturation.
If the difference between the two output currents IOUT1 and IOUT2 is taken for each of these possible control input situations, three separate current results are possible, +IIN, xe2x88x92IIN, or 0. Thus, a single input current can be transformed into multiple different output currents. In a similar manner, by transforming the output currents to voltages and taking the difference between the output voltages, three different output voltages can be generated depending upon the values of the control signals C1 and C2.
However, the conventional differential amplifier current source does not allow a very high voltage swing at the outputs because of the digitally controlled transistors 23 and 25 placed in series with the current source from the input node 21. This is because the first and second control nodes 27 and 29 must stay in saturation, and too high a voltage swing will bring the first and second control nodes 27 and 29 out of saturation.
It is thus an object of the present invention to overcome or at least minimize the various drawbacks associated with conventional techniques for providing accurate, differentially switched currents onto different loads.
It is another object of the present invention to provide differentially switched current source that can rapidly switch between various outputs, yet maintain the desired level of accuracy.
According to one aspect of the present invention, a switched current source is provided, comprising: a differential amplifier used as a controlled current switch, having a current input, a first control input connected to a first node, a second control input connected to a second node, and first and second current outputs; a voltage amplifier, having a first amplifier input connected to a reference voltage, a second amplifier input connected to the current input, and an amplifier output connected to an amplifier output node; a first switch connected between the amplifier output and the first node, and being controlled by a first control input; a second switch connected between the amplifier output and the second node, and being controlled by a second control input; a third switch connected between the current input and the first node, or to a reference node, and being controlled by a third control input; and a fourth switch connected between the current input and the second node, and being controlled by a fourth control input.
According to another aspect of the present invention, a first current source is provided for providing a first current to the current input and the first current source comprises: a second current source; and a first current mirror connected to the second current source and operating to provide the first current to the current input node.
According to yet another aspect of the present invention, the differential amplifier comprises: a first differential transistor having its gate connected to the first node, its source connected to the current input node, and its drain connected to the first current output; and a second differential transistor having its gate connected to the second node, its source connected to the current input, and its drain connected to the second current output.
According to still another aspect of the invention, a switched current source is provided, comprising: a first differential transistor having its gate connected to a first intermediate node, its source connected to an input node, and its drain forming a first output node; a second differential transistor having its gate connected to a second intermediate node, its source connected to the ink node, and its drain forming a second output node; a voltage amplifier, having a first amplifier input connected to a reference voltage, a second amplifier input connected to the input node, and an amplifier output; a first switching transistor connected between the voltage amplifier and the first intermediate node, having its gate connected to a first control input; a second switching transistor connected between the voltage amplifier and the second intermediate node, having its gate connected to a second control input; a third switching transistor connected between the input node and the first intermediate node, having its gate connected to a third control input; and a fourth switching transistor connected between the input node and the second intermediate node, having its gate connected to a fourth control input.